The present invention is directed to testing switch matrices for flat-panel displays.
An active-matrix liquid-crystal display (LCD) is a flat=panel device that comprises a screen divided into pixels, each of which contains liquid-crystal material disposed between an individual pixel electrode and an electrode common to all of the pixels. By varying the potential across the liquid-crystal material at different pixels, one can change the polarization of the light that has propagated through the material at those pixels, and by interaction with a polarizing filter, thereby form an image on the screen.
In an active-matrix-type liquid-crystal display, a separate transistor drives each pixel. FIG. 1 depicts in schematic form a portion of a switch matrix employed for this purpose. The display is organized into rows and columns of pixels, and the drive matrix 10 includes an electrode like electrode 12 for each pixel. Upon assembly into a complete display, electrode 12 will be disposed on one side of the liquid-crystal material, and the common electrode, disposed on the other side, will be tied to a fixed common voltage. To control the voltage on pixel electrode 12, an insulated-gate field-effect-transistor Q1 is provided with its source connected to electrode 12 and its drain connected to a common line 14, to which the drains of the transistors that control all of the pixels in the same column are also connected. We will refer to lines such as line 14 as "column lines,""drain lines," or "data lines." Similar column lines 16 and 18 are connected to the drains of the transistors for different pixel columns.
The gate electrode of transistor Q1 is connected to a row line (or "select line" or "gate line") 20, which conducts enabling signals to the gates of the transistors that control all of the pixels in the same row. Row lines 22 and 24 similarly conduct enabling signals to transistors in different rows.
Drive matrices for flat-panel displays are among the most difficult of electronic devices to fabricate. Their fabrication involves depositing well over 100,000 transistors, together with the associated interconnecting conductors, onto glass. The yield from the fabrication process therefore is typically very low. It is therefore important to test the drive matrix before it is assembled into a display.
However, testing the matrix before it is assembled into the completed part presents significant problems because the matrix lends itself neither to functional testing nor to in-circuit testing. In-circuit testing, i.e., probing internal nodes so as to test the functions of the individual internal devices--in this case the individual transistor drives--is difficult; the small sizes of the transistors make it virtually impossible to probe their individual terminals by conventional techniques, while the use of more-exotic devices, such as scanning electron microscopes, to determine internal node voltages can be prohibitively expensive.
Because of the relatively low number of readily accessible terminals, it might initially seem preferable to employ functional testing, in which only the overall result of the complete circuit's operation is verified by stimulating the device from readily accessible contact points and observing the resulting functional behavior. Unfortunately, the matrix's overall function is to vary pixel transparencies, so there is little external behavior to observe before the liqiud-crystal material is applied.
U.S. Pat. No. 5,057,775 to Hall discloses a method for testing such matrices that does not require a demonstration of the overall functional result but that permits the needed probing to be restricted to little more than the readily accessible terminals on the matrix. FIG. 2 depicts one approach described in that patent. It shows a contact pad 26 in which gate line 20 of FIG. 1 terminates, and it shows a similar contact pad 28 in which drain line 14 terminates. In order to prevent damage due to electrostatic fields that can build up during processing and handling, many manufacturers include a guard ring 30, to which the contact pads 26 and 28 are connected by means of conduction paths 32 and 34, respectively, so as to prevent damaging potential differences.
In one embodiment of the Hall invention, probes 36 and 38 introduce a signal generated by a combination of an AC generator 40 and a DC generator 42 between the gate-line contact pad 26 and the guard ring 30. The DC source 42 is operated selectively to apply either a potential that will turn on transistors in the row controlled by line 20 or a potential that will turn them off. It will be convenient below to refer to these sources collectively as a composite source 43. Probes 44 and 46 contact the drain-line contact pad 28 and the guard ring 30 and lead to respective input ports of a differential amplifier 48 connected in a feedback arrangement so as to tend to drive the drain-line contact pad 28 toward ground in the conventional feedback-amplifier manner. The resultant output voltage of that amplifier is then proportional to the current that flows in drain line 14: the amplifier operates as a current detector. A phase-sensitive detector 50 receives the amplifier output as well as the signal from the AC source 40, and it thereby extracts the in-phase and quadrature components of the drain line's AC current that results from the AC voltage applied to the gate line. Analysis and control circuitry 52 then detects defects and presents them on a display 54 in a manner described in more detail in the Hall patent, which we hereby incorporate by reference.
In general, however, the approach of the Hall patent is to determine whether a transmittance--i.e., a transimpedance or a transadmittance--meets certain predetermined criteria. More specifically, the test ordinarily involves a determination of whether the proper transmittance change occurs when the value of the DC source 42's output is switched between that which should turn transistors on and that which should keep them turned off.
This can be understood by referring to FIG. 1, in which current sensor 56 represents the combination of amplifier 48 and phase-sensitive detector 50 of FIG. 2. With transistor Q1 turned off, an AC signal applied to gate line 20 will cause a current to flow in drain line 14 predominantly because of a capacitance C.sub.GD between gate and drain lines 20 and 14. That capacitance accordingly provides a transadmittance between the port at which the driving signal is applied and that at which sensor 56 measures current.
If the DC voltage applied to the gate line 20 turns on transistor Q1, however, that transistor connects to drain line 14 a capacitance C.sub.ER that exists between the gate line 20 and the pixel electrode 12. The transadmittance between the two ports will thereby increase. This transadmittance change is accordingly an indication that the transistor is operating properly.
As FIG. 1 indicates, the method would typically be performed by using a number of additional current sensors, such as sensors 58 and 60, to measure other transadmittances simultaneously; a single row line such as row line 20 would be driven, and the currents in many (or all) of the column lines that it crosses would be sensed simultaneously.
The foregoing description of the Hall method shows this application to one kind of display arrangement. It happens in some cases that the pixel electrodes such as electrode 12 overlap the adjacent row line, such as row line 24, or are otherwise in such proximity to it, that significant storage capacitance C.sub.S between them results, and pixel voltages are therefore better maintained between raster scans of the display. For such displays, it may be desirable to test the C.sub.S value, too, and in such cases an AC voltage would additionally be applied to the adjacent gate line. The current measured would thus result from two transadmittances. In still other switch-matrix arrangements, the storage capacitance C.sub.S is provided between the pixel electrode and other "row" lines, parallel to the gate lines, that are not used for gate control but instead act only to provide the additional storage capacitance. In some versions of the Hall method, therefore, such so-called C.sub.S bus lines are also driven.
In every case, however, the purpose is the same, namely, to make a measurement of a quantity that is indicative of a composite capacitance, which we will refer to as C.sub.X, that is specific to the location at which the driven row line or lines and the sensed column line intersect. By measuring this capacitance and, typically, a similarly location-specific conductance, one can detect any defects that affect these quantities.
While the method described in the Hall patent is quite an effective way of detecting many defects, the effects of some defects on the pixel capacitance C.sub.X to be sensed are relatively small. To use the method to detect that type of defect thus requires that the method be practiced with a certain precision, and this has presented a problem. Specifically, although the transadmittance measured between a given gate-line terminal and a given drain-line terminal would be most responsive to the capacitance C.sub.X of the location at which those lines intersect, there are well over 100,000 locations in the matrix, and their contributions to that transadmittance, however small individually, have heretofore proved quite significant in total. There are therefore a number of commonly encountered defects that were difficult to detect by previous approaches to applying the Hall method.